Design And Reuse

High-Speed Heterogeneous Integration with Multiphysics Analysis for TSMC SoW-X

TSMC's System-on-Wafer (TSMC-SoW™) technology and its highly advanced design necessitate a reliable and efficient ...
EDN

High-speed, low-power serdes woos backplane upgrades

San Jose, Calif. – Accelerant Networks Inc. has lowered the power and boosted the equalization on its high-speed serializer/deserializer transceivers, aiming at design wins that boost the backplane ...
Electronic Design

SERDES Chip Improves Signal Integrity, Provides For Real-Time Waveform Viewing

The VSC3441 high-speed serializer/deserializer (SERDES) from Vitesse Semiconductor incorporates clock and data recovery (CDR) circuits and advanced equalization to compensate for various impairments ...
EDN

Collaboration focuses on low-cost, high-speed serdes I/O test

SAN FRANCISCO — LogicVision Inc. and DA-Test have announced a collaboration on low-cost, high-accuracy testing of high speed serializer/ deserializer (serdes) circuits. Using LogicVision's ETSerdes ...
Design-Reuse

High-Speed SerDes Design: Architecture, Equalization, and CDR Circuits

The demand for high-bandwidth communication is increasing across a wide range of applications. Data centers, networking equipment, automotive platforms, high-performance computing systems, and chiplet ...